As integrated circuits become smaller and faster, the critical dimensions (CD's) of the devices and interconnections also must decrease. As these CD's get closer to the resolution limits of optical lithography and microscopy measurement techniques, great care must be taken to eliminate all possible sources of measurement error in order to obtain accurate and reproducible critical dimensions. One nearly universally used measurement technique is Scanning Electron Microscopy (SEM), which utilizes highly focused energetic beams of electrons impinging on the sample and measures the yield of secondary emitted electrons. SEM is the most widely used tool for VLSI measurement and morphology analysis, due to its high resolution of approx. 10-30 Angstroms, and relative ease of use.
FIG. 1 depicts an SEM system, showing the electron source and the acceleration, focusing, and detection electronics. FIG. 2 shows a typical electron emission energy spectrum resulting from the incident electron beam of an SEM. The highest energy peak results from the backscattered electrons, which have energies close to that of the incident beam, and which have undergone only elastic collisions with the target atoms. Peaks 20 seen at intermediate energies are the Auger electrons emitted due to relaxation of electrons between atomic energy levels. The lowest energy emitted electrons 22, produced by inelastic collisions between the primary beam and the inner shell electrons of the sample, are known as the secondary electrons and are generally the most useful for morphology studies in VLSI. This is due in part to the extremely short escape depth of secondary electrons, which yields high surface sensitivity. In addition, since the incident electron beam undergoes beam broadening due to multiple collisions as it penetrates into the sample, the backscattered electrons originating from deeper into the sample reflect this broadening with degraded point-to-point resolution. The lower energy secondary electrons which escape the sample originate from the surface region above the penetration depth where beam broadening becomes influential, and therefore yield higher point-to-point resolution than evidenced by backscattered electrons.
The detected electron current, typically chosen to be the secondary electron current as described above, is used to intensity modulate the z-axis of a CRT. An image of the sample surface is produced by synchronously raster scanning the CRT screen and the electron beam of the SEM.
The contrast of the image depends on variations in the electron flux arriving at the detector, and is related to the yield of emitted electrons per incident electron. The yield is dependent on both the work function of the material and the surface curvature. These factors allow the SEM to distinguish between materials such as metal, oxide, and silicon, and also to distinguish surfaces which differ in slope. Thus, Critical Dimensions (CD's) of patterned and/or etched lines and gaps can be measured.
Two factors affecting the accuracy of SEM measurements are resolution and charging effects. The resolution of the SEM depends on the type of sample under inspection and on the incident beam diameter or "spot size". The high voltages of the electron beam required to produce small scanning spot sizes were historically one of the sources for charging of the surface when examining insulating surfaces. When incident beam energies exceeded the secondary electron crossover point, i.e., when the incident beam penetration depth was high enough that the number of emitted secondary electrons was less than the number of incident electrons, the surface in the region of the scanning beam would acquire excess negative charge. This would cause the incident beam trajectory to be disturbed, and would therefore degrade the image. Grounding schemes such as coating the surface with gold and attaching a ground wire to the coating were used to reduce charging effects. These methods prohibited further processing following inspection of wafers. More recent SEM machines have eliminated high energy accelerating voltages, thus eliminating that source of charging. High voltage SEM's with gold coated samples are still used to verify CD's as measured in low-voltage SEM's.
However, semiconductor wafers can also acquire appreciable electrostatic charge during processing steps such as photoresist spin and expose. For example, it has been experimentally found that the charge on the resist layer after resist processing at the contact level is negative and can reach a magnitude of up to several hundred volts. This accumulated electrostatic charge can create severe undesirable effects in metrology, as well as to the devices themselves. For example, due to deflection of the incident e-beam during SEM linewidth/image inspection, the image focus is degraded. The negative surface charge also acts to accelerate emitted electrons away from the sample surface, thereby changing the time-of-flight to the detector and affecting the magnification. This has caused pitch measurement errors of as much as 10% for a 1.8 micron pitch.
Additionally, accumulated electrostatic charge on the wafer can adversely affect product yield by attracting airborne contaminant particles to the surface.
A non-destructive method of substantially eliminating accumulated electrostatic charge before SEM measurements or inspection, and which would permit continued processing of the inspected wafers, would restore the fidelity of CD measurement and reduce the undesirable effects of charging.